The present invention relates to a synchronous machine regulator for controlling terminal voltages of a synchronous machine.
In an excitation system for a synchronous machine, a thyristor rectifier excites a field winding of the synchronous machine to control terminal voltages of the synchronous machine, as disclosed, for example, in JP-A-2003-250297. Power is supplied to the thyristor rectifier from an excitation transformer connected to output terminals of the synchronous machine. The thyristor rectifier is constituted of a plurality of three-phase full-wave rectification thyristor bridges connected in parallel. The number of thyristor bridges is generally about one to ten, although the number depends upon a field current value of the synchronous machine.
A synchronous machine regulator receives output voltages and output currents of the synchronous machine via a potential transformer and a current transformer. The signal levels of the output voltages and currents are converted into values suitable for inputs to the regulator by signal conversion units or the like, to be input to a regulation calculation means for excitation regulation. For example, the regulation calculation means is classified into three types depending upon calculation periods. First is high speed signal detection calculation by which output voltages and output currents of the synchronous machine converted by the signal conversion units or the like are sampled to detect signals of synchronous machine voltages, an active power, a reactive power and the like at a predetermined high speed calculation period (e.g., about 1.0 to 2.0 ms). Second is high speed control calculation and the like by which by using the results of the high speed signal detection calculation, control calculation such as control for output voltages of the synchronous machine is conducted at a predetermined high speed calculation period (e.g., about 5.0 to 20.0 ms) to output the calculation results to a gate drive circuit for controlling the thyristor rectifier. Third is low speed control calculation (at a calculation period of about 50.0 to 100.0 ms) and the like for controlling gate pulse outputs to the thyristor rectifier. Namely, the gate drive circuit receives control on/off commands output on the basis of the low speed calculation results, and thereafter outputs signals of the calculation results of the high speed control calculation by amplifying the signals to become signals suitable for the thyristor gates, to thereby adjust a synchronous machine field current and control output voltages of the synchronous machine.
A thyristor rectifier is constituted of a plurality of thyristor bridges connected in parallel. Current distribution among these bridges is adjusted by inductance of each thyristor AC bus, and for fine adjustment, a cut core is inserted into the bus.
As described above, synchronous machine regulation calculation is classified into three types depending upon a difference between calculation periods. When a load of a central processing unit (CPU) is taken into consideration, two control circuit boards are required at minimum, such as a control circuit board mounting one CPU for high speed signal detection calculation and high speed control calculation and a control circuit board mounting one CPU for low speed control calculation. If dual systems are incorporated for redundancy to improve reliability, four control circuit boards are necessary, resulting in corresponding cost-up.
Further, current distribution among thyristors is adjusted by inductance of each thyristor AC bus, and for fine adjustment, a cut core is inserted into the bus. In order to insert a cut core, it is necessary to disassemble the bus and then assemble it again. Therefore, a work cost rises and a cost for the cut core increases. From these reasons, it is difficult to provide an inexpensive synchronous machine regulator and a compact synchronous machine regulator because of an increase in the number of mount components.